In recent years, there is a growing demand for liquid crystal projectors as high definition display devices used for presentation, home theater, etc. The liquid crystal projector, which is a kind of a liquid crystal display device, is expected to be used widely as household devices such as a rear projection television, so that it is crucial for the liquid crystal projector to obtain reliability sufficient for consumer use.
In the liquid crystal projector, a TFT is used in a drive circuit section of a liquid crystal panel that composes the liquid crystal projector. Operation of the TFT, however, generates a variation in threshold voltage and a resultant lowering of driving current, thereby causing a serious problem in the reliability of the liquid crystal projector.
The variation in threshold voltage is deterioration of TFT characteristics. As a deterioration mode involving the variation in threshold voltage, known is deterioration due to heat generated by self-heating of the TFT. Depending on a product of a drain voltage Vd applied to the TFT and a drain current Id that flows the TFT during the operation, the variation in threshold voltage is presumably caused by the heat generated by the self-heating of the TFT.
The liquid crystal panel is generally composed of a display section for displaying an image and a driver circuit section for driving the display section. In recent years, a method has come to be used in which the display section and the driver circuit section are simultaneously formed on a transparent insulating substrate using poly-Si (polycrystalline silicon) having high mobility (driver monolithic type). In a liquid crystal panel formed by this method, a TFT used in the driver circuit section is surrounded by materials having low heat conductivity, such as a silicon oxide film composing a transparent insulating film and silicon dioxide composing the transparent insulating substrate. This makes it difficult for the TFT to dissipate the heat generated by the self-heating, resulting in that the deterioration of the TFT characteristics becomes more serious than ever.
In order to prevent the deterioration of the TFT characteristics, various TFTs capable of easily dissipating the heat have been suggested conventionally. Among them, Japanese Unexamined Patent Publication 97701/1999 (Tokukaihei 11-97701; published on Apr. 9, 1999) discloses an MOS (Metal Oxide Semiconductor) transistor in which (i) a plurality of (N) divided channel regions (having a total channel width Wt) are formed, and (ii) a spacing S between the divided channel regions is not smaller than a channel width W (W=Wt/N) of one of the divided channel regions. This realizes a structure capable of reducing the heat generation and capable of easily dissipating the heat. Hereinafter, the channel region that is divided is referred to as a divided channel region, and the channel width W of the divided channel region is referred to as a channel divided width.
However, in the conventional arrangement disclosed in the above publication, the spacing S that is not smaller than the channel divided width W is required between the divided channel regions, in order to prevent the deterioration of the TFT characteristics. This results in the driver circuit section having a very large layout area.
In FIG. 8, a reference symbol La shows a relation between the channel divided width W and a layout width WL that is required for arranging the TFT, in a case where a single-unit TFT (whose channel region is not divided) having a total channel width Wt of 300 μm is so arranged that the channel region is divided into N, and a spacing S between the divided channel regions (hereinafter referred to as a channel spacing S) is the same as the channel divided width W, in accordance with the conventional arrangement.
The line La in FIG. 8 shows that, in the conventional arrangement, as the number N of divided channel regions increases (namely, as the channel divided width W decreases), the TFT layout width WL proportionally increases.
For example, the TFT layout width WL is 550 μm where W=S=50 μm, and 590 μm where W=S=10 μm. These TFTs thus require the layout area nearly twice as large as the layout area of the single-unit TFT having a total channel width Wt of 300 μm.
Consequently, in order to realize a layout of the driver circuit section with obtaining the above-described relation of the channel divided width W and the channel spacing S, without changing a size of the liquid crystal panel, namely without changing a size of the transparent insulating substrate, an area of the display section is narrowed. This consequently narrows a pixel pitch of the liquid crystal panel, thereby lowering an open area ratio.
On the other hand, in order to realize a layout of the driver circuit section with obtaining the above-described relation of the channel divided width W and the channel spacing S, without narrowing the pixel pitch and without lowering the open area ratio, the size of the liquid crystal panel inevitably increases.
As a result, in the above-described conventional arrangement, it is quite difficult to obtain both the TFT reliability and the retained open area ratio without increasing the size of the liquid crystal panel.